Now that you have Vivado all setup and some blink IP created, let's create a blink project. Click on the Vivado icon and then select "Create Project"
I chose to save my project in the firmware folder and I named my project blink. Note that a blink subfolder will be created within the firmware directory.
Click "Next" for the following three screens.
On this screen make sure to select the "Boards" icon and then select your Snickerdoodle board.
Click "Finish" and the Vivado project GUI will open up.
The first thing you need to do is to create a block diagram by clicking on the "Create Block Design" text on the left of the screen.
I typically leave the default design name of "design_1" but you can put in anything that you like. Then click "OK"
A new blank block diagram will be created and I typically like to maximize it.
The first part that will be added to every Zynq design is the actual Zynq processor. Add the part by clicking the + button and typing zynq into the IP search window as shown below.
After placing the Zynq block click on "Run Block Automation" to allow Vivado to connect up the block to various ports such as the DDR memory.
Leave the defaults here and click "OK." This will link up the DDR per the board preset file that we selected in the beginning of this tutorial.
Now that the DDR and fixed inputs/outputs are setup, connect the FCLK_CLK0 to the M_AXI_GPIO_ACLK port. This is somewhat confusing but it is basically connecting up the AXI system to the clock. Don't worry about the details but just know that one always has to perform this step.
Now that the Zynq block is all set it's time to add the blink IP package that we created before. The problem is that Vivado doesn't know where that IP is located. To show Vivado where our IP is located click on the "Settings" text on the left side of the scree.
Navigate to the Repository section and click the + button to add your repository to the list. Notice how I did not select the location of the blink IP but rather the location of the global IP folder which contains the blink IP.
You should get a pop-up windows stating that indeed the blink IP was added to the project.
Now go back to the block diagram and hit "CTRL + Q" in order to minimize the left hand toolbar. Now that you have a full screen block diagram do a right-click and select "Add IP" as shown below.
Start typing blink and you should see your IP show up.
Place your blink IP on the block diagram and connect it up as follows.
You will need to right-click on the blink_out port and select "Create Port" from the dropdown box.
Name the port "led" as this name will be used in the constraints file down the road.
Hit F6 or click on the icon shown in the image to validate your design. You should get a success pop-up as shown below.
Now click on the sources tab to the left of the screen as we need to create a VHDL wrapper to contain the block diagram.
Right-click on the design_1 text and click on the "Create HDL Wrapper" option from the dropdown list.
Typically I select to let Vivado manage my wrapper unless I am working on an advanced project.
When you hit "OK" you will see that a design_1_wrapper.vhd file is created. If you called your block diagram something different then the wrapper name might be different as well. Below I have shown the top portion of the wrapper file as viewed through notepad++. Notice that the top level entity lists all of the special DDR and fixed input/output pins as well as your new "led" pin. Every time you add any external port to the block diagram you need to make sure that Vivado successfully updates this file which it should do automatically if you selected that option previously.
The last thing to do before compiling the project is to add a constraints file so that Vivado knows which pin to send the led signal out to. Right-click on the constrs_1 text and select the "Add Sources" option from the dropdown list.
Click "Create File"
Type in "constraints" and click "OK"
Now you have a blank constraints file that needs to be populated.
One can either pull down the Snickerdoodle constrains file from github or just use this one which I have pulled down. Note that the constraints are located in the snickerdoodle_GPIO\snickerdoodle_GPIO.srcs\constrs_1\new folder if you pull it down from github.
The constraints file is setup for some of the Snickerdoodle example projects and we will need to modify it a bit. The below image shows that the constraint associated with the 4th pin on connector JA1 is G14.
At this point I highly recommend pulling down the snickerdoodle book which shows the location of the Snickerdoodle pins in the appendix. The image below shows exactly where pin JA1.4 is located on the JA1 connector.
Simply copy lines 15 and 16 from the original constraints file and paste them into your new constraints file. Don't forget to rename the signal to "led" as shown below.
Save the constraints file and click on "Generate Bitstream" in the lower left corner of the screen.
Go get a cup of coffee and when you return hopefully you will see the below window. Congratulations! You have created your first Vivado bit file. If you like you can view the reports, but after that feel free to exit Vivado.
After all of that hard work it can be very confusing about what to do next. The key thing to know is the location of your .bit file which is located in the directory below. Note that your directory can be a little different based upon your naming conventions.
Now that you have a blink .bit file the next step is to flash it onto the Snickerdoodle. There are two main ways to do this: